The present invention relates generally to multiprocessor systems in which data is exchanged between the microcomputers and, more particularly, to a multiprocessor system in which a microcomputer with a dual port memory is used.
A multiprocessor system using a conventional dual port memory is shown in FIG. 3. The single-chip microcomputer A1 consists of a central processing unit A (CPUA) 2 for performing various operations and data processing; a read only memory A (ROMA) 3 in which programs are stored; a random access memory A (RAMA) 4 in which data, etc. are stored; an input/output (I/O) port A 5 for exchanging data with external equipment; and internal address, data, and control signal buses A6, A7, and A8 for interconnecting the above units 2-5. Similarly, a single-chip microcomputer B9 consists of a CPUB 10; a ROMB 11; a RAMB 12; an I/O port B13; a dual port RAM (DPRAM) 14 enabling opposite ports to write and read data; and internal address, data, and control signal buses B15, B16, and B17. The microcomputer A1 is connected to the external bus ports of DPRAM 14 via external address, data, and control signal buses 18, 19, and 20 to form a multiprocessor system.
As shown in a memory map of FIG. 4, the memory areas of CPUA 2 and CPUB 10 each consist of addresses "0000" through "FFFF". The addresses of ROMA 3 and ROMB 11, RAMA 4 and RAMB 12, and DPRAM 14 are mapped such that they do not overlap each other.
Data transfer will be described. The data used by the microcomputer A1 is normally loaded in the RAMA 4 and read by the CPUA 2 for processing. When the data is transferred to the microcomputer B9, the CPUA 2 reads the data required by the microcomputer B9 from the RAMA 4 and transfers it to the DPRAM 14 via the external buses 18-19. Then, the CPUB 10 reads the data from the DPRAM 14 and load it in the ROMB 11. When the data is transferred from the microcomputer B9 to the microcomputer A1, the above procedure is reversed. In this way, the DPRAM 14 bridges the two CPUs 2 and 10 for data transfer. If the area where data to be transferred from the microcomputer A1 to B9 (A.fwdarw.B) is placed overlaps the area where data to be transferred from the microcomputer B9 to A1 (B.fwdarw.A), data can be lost unless the procedure of data transfer is well managed. For this reason, the memory area of the DPRAM 14 is divided by the direction of data transfer.
The multiprocessor system is used to separately control various devices such as an engine and a transmission in a vehicle while the respective microcomputers are related to provide sophisticated control. A total control system for an automobile drive train is shown in FIG. 5. This total control system consists of an engine 50; a transmission 60; a microcomputer A1 for controlling the engine; and a microcomputer B9 for controlling the transmission. Data is inputted from an analog sensor 51a and a digital sensor 51b, which are mounted on the engine 50 to sense the number of revolutions and the temperature, to the microcomputer A1 via an A/D converter 52a and a counter 52b to process the characteristic data of the engine, such as the number of revolutions and the temperature, for controlling a fuel injection/ignition control actuator 53 via an I/O port 5. Similarly, data is inputted from an analog sensor 61a and a digital sensor 61b, which are mounted on the transmission 60 to sense the gear position and the torque, to the microcomputer B9 via an A/D converter 61a and a counter 62 b to process the characteristic data of the transmission, such as the gear position and the torque, for controlling an oil pressure control actuator 63 via an I/O port 13. In addition, data is transferred between the respective microcomputers 1 and 9 via a DPRAM 14 and an external buses 18-20 to add to the data inputted to each microcomputer 1 or 9 to control the engine 50 and the transmission 60 in a sophisticated manner.
In the conventional multiprocessor system, it is necessary to operate both the CPUs A2 and B10 to transfer data between the microcomputers A1 and B9 with the aid of software. Consequently, an additional load is put on both of the CPUs, and the software is troublesome to process. The presence of the software limits the transfer speed so that the system cannot be used for real time process which requires high process speed. In the automobile control, the larger the amount of data transferred between the two CPUs, the more sophisticated the control. However, the real time process speed of the microcomputers 1 and 9 is so high that there is little time for data transfer between the CPUs, resulting in the small amount of data transferred.
Where a microcomputer B9 is added to control the transmission for enhancing the performance of an automobile which has had a microcomputer A1 to control the engine, it is necessary for performing data transfer to change the memory area of the CPUA 2 so that it corresponds to the memory area of the DPRAM 14. This brings about an overhead problem in software for handling the DPRAM 14. If the program were not changed, it would be not only impossible to transfer data to the microcomputer B9 but also difficult to separate or connect the respective microcomputers.